| 1 |
|
38.30%
|
Speedy Engineer: Finished a level under 5 minutes thanks to practicing |
level_time_5 |
| 2 |
|
10.40%
|
Soldering Burns: Soldered 30 logic components, most of them badly |
logic_30 |
| 3 |
|
9.20%
|
The Seeds of Memories: Used a latch to remember signal's past state |
latch |
| 4 |
|
7.10%
|
Electric Dunes: Completed a test sequence in the Sandbox mode |
sandbox |
| 5 |
|
5.40%
|
Design-Fu Master: Wasted over two hours, but eventually finished the level |
level_time_120 |
| 6 |
|
4.50%
|
Beating the Clock: Used an edge detector to generate clock signal |
clocking |
| 7 |
|
3.00%
|
Mr. Boolean: Completed all levels on Digital Logic |
logic_done |
| 8 |
|
2.50%
|
Dunning-Kruger in Effect: Have 1:3 ratio of successful tests |
tests_ratio_75 |
| 9 |
|
1.90%
|
The First Lines: Used 30 words of executable words |
program_30 |
| 10 |
|
0.70%
|
Getting the Hang of It: Soldered 100 logic components |
logic_100 |
| 11 |
|
0.60%
|
Programming With Ease: Used 100 words of executable code |
program_100 |
| 12 |
|
0.10%
|
The Art of Programming: Used 250 words of executable code |
program_250 |
| 13 |
|
0.00%
|
EE Senior: Soldered 250 logic components |
logic_250 |
| 14 |
|
0.00%
|
Please, Send Some Data: Used a microprocessor due to a shortage of storage capacity |
mpu |